Logic Design Engineer

As Logic Design Engineer, you will use your RTL design skills to implement complex SoCs for advanced ARMv8-based server systems and state-of-the-art communication components. You will collaborate closely with SoC architecture, DV (Design Verification), SE (Silicon Engineering) in active projects and sustaining engineering activities. Using your Verilog and System Verilog coding and problem solving skills, you will design internally developed IPs as well as integrating 3rd party IPs. You will be responsible for the full life cycle of design, from specification creation and RTL coding to synthesis and timing closure.
Responsibilities

· Create detailed design specifications based on architecture and micro-architecture specifications

· Design RTL and coding for high speed design

· Develop RTL Linting and CDC scripts, evaluation of results, and corrective actions

· Support silicon bring-up and silicon validation

· Minimum 5+ years of digital SoC logic design experience

· Experience with SoC AMBA bus architectures such as CHI, AXI, AHB, APB and advanced connectivity implementations such as Network-on-Chip (NoC)

· Knowledge of CPU architecture, microarchitecture is a plus

· Knowledge of complex IO protocols such as Gen4/Gen5 PCIe, DDR4/5 is a plus

· Strong in System Verilog RTL design

· Strong in scripting languages (PERL, Python, shell, etc.)

· RTL & gate simulation experience and good debugging skills

· Experience with Lint and CDC tools and flows

· Experience with synthesis and STA flows

· Good English and Vietnamese communications skills, both verbal and writing

Education

· BS/MS in Electronic Engineering/Computer Engineering or equivalent