Physical Design Engineer (Work Location: Taiwan)

The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, APR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. Candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements.

-Self-motivated and excellent team spirit
-Experience in advanced technology nodes is a plus
-Knowledge of lower power design
-Good English speaking and writing capability
-In-depth understanding of place and route flow
-Bachelor or Master degree in Electrical Engineering or Computer Engineering with 4+ years’ relevant working experience
-Experience in block level place and route implementation with multi-voltage & multi-corner designs
-Expertise in Cadence Innovus and/or Synopsys ICC2
-Timing closure and power analysis skills
-Good interpersonal and communication skills
-Good coding skills in TCL
-Hands on experiences in layout verification and DRC fixes
Please submit your resume with details in English for us to determine the perfect fit.
*Work Location: Taiwan

Competitive Compensation Package

Health and Group Insurance

Meal Allowance

Cập nhật gần nhất lúc: 2022-11-07 12:32:04