Synopsys HCMC - Memory Layout Engineer, Senior

Position

Our team is looking for an experienced Memory Layout Design Engineer who plays a critical role in layout design for various foundation IPs.
Responsibilities:
In the role of a Senior Layout design engineer, you will take the responsibility to:

Improve and Determine methods and procedures for Layout development flow
Design, develop and modify layout design for Embedded Memory IPs, Standard Cells, IOs

Key Qualifications

Typically, minimum of 2 years of experience in Layout design
Advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout.
Bachelor’s or Master’s degree, Electronics Engineering, Telecommunication, Physics or related fields
Strong communication, documentation and analytical skills.

About Synopsys:
Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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Cập nhật gần nhất lúc: 2024-06-05 06:15:03