93970 - Design & Verification Engineer Leader- Semiconductor (LSI)

- Working location: Dist. 3, HCMC

- Monthly Salary: 36M ~ 77M

With the specifications required by the customer as INPUT
Carry out specific design verification work using the following languages

**OUTPUT
Verification environment manual (English)
Verification environment construction / verification scenario (System Verilog / SVA / UVM / C)
Functional specifications (English)
Verification strategy (English)
Implementation specifications (English)
RTL (Verilog / SystemVerilog)
Verification result report (English)
Verification item table (English)
- Other tasks assigned by the manager

Requirements

- More than 3 years experience as Engineer Leader in the semiconductor industry, having skills as below;
- Gender: Any
- Age: under 35
*Design and verification using a general- purpose bus AMBA(AXI/AHB/APB)
*Assertion- Based Verification
*Front- end design and verification of ASIC
*RTL design by Verilog HDL/VHDL
- Technician who can do tasks by himself/herself

- Technical skills as below
- English skill : Business level(overseas business trip, meeting with overseas engineers)
Design and verification of high- speed interfaces such as PCI Express and USB
Testbench building that applied verification methodology(UVM)
Design and verification of ASIC built- in CPU
Random verification using SystemVerilog

NOTICE:

Only shortlisted candidates will be approached by RGF&039;s consultant. Your resumes will be recorded in our system, and you will receive our Job Introduction Auto- email with suitable jobs in the coming time. Please check your email regularly to get our vacant job. Thanks so much!

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Cập nhật gần nhất lúc: 2024-04-03 12:04:14